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注:
1) CPU: Samsung S3C2410x
SDRAM: 64MB/Bank6
Flash: 16MB/NAND or 16MB/Intel Strata NOR(bank0)
2) 写一个空的C_Entry()函数,然后在ADS1.2中编译后生成bin文件直接烧入Flash即可作为一个简单的初始化代码,完成s3c2410的初始化,后续调试代码可以直接下载到SDRAM中.(RAM_STARTADDRESS=0x30000000)
;=====================================; NAME: 2410INIT.S ;; DESC: S3C2410 EVB Startup Code ;; AUTH: PALaDiN@nicesun.com ;; REV: 1.0.1 ;; DATE: MAY,2003 ;;=====================================GBLL IDE_TYPEGBLL CPU_CLK_200IDE_TYPE SETL {TRUE} ;TRUE=ADS1.2 ;FALSE=SDT2.5 [ IDE_TYPE GET option.s GET memcfg.s GET 2410addr.s ;here GET means INCLUDE used in C language| GET option.a GET memcfg.a GET 2410addr.a ];Pre-defined constantsUSERMODE EQU 0x10FIQMODE EQU 0x11IRQMODE EQU 0x12SVCMODE EQU 0x13ABORTMODE EQU 0x17UNDEFMODE EQU 0x1bMODEMASK EQU 0x1f ;This means System Mode.NOINT EQU 0xc0 ;;The location of stacks FIQStack EQU _STACK_BASEADDRESSIRQStack EQU FIQStack+0x1000AbortStack EQU IRQStack+0x1000UndefStack EQU AbortStack+0x400SVCStack EQU UndefStack+0x400UserStack EQU SVCStack+0x1000;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;MACRO $HandlerLabel HANDLER $HandleLabel ; HANDLER is macroname ; $HandlerLabel is special macro name ; $HandleLabel is a variable$HandlerLabel sub sp,sp,#4 ;decrement sp(to store jump address); sp<----sp - 4, ARM Stack is Full_Decending stmfd sp!,{r0} ;PUSH the work register to stack(lr does not push because it return to original address) ldr r0,=$HandleLabel ;load the address of HandleXXX to r0 ldr r0,[r0] ;load the contents(service routine start address) of HandleXX str r0,[sp,#4] ;store the contents(ISR) of HandleXXX to stack ldmfd sp!,{r0,pc} ;POP the work register and pc(jump to ISR)MEND;=============================================================== IMPORT |Image$$RO$$Limit| ; End of ROM code (=start of ROM data)IMPORT |Image$$RW$$Base| ; Base of RAM to initialiseIMPORT |Image$$ZI$$Base| ; Base and limit of areaIMPORT |Image$$ZI$$Limit| ; to zero initialise AREA Init,CODE,READONLY CODE32 ENTRY b ResetHandler ; b HandlerUndef ;handler for Undefined mode 0x4b HandlerSWI ;handler for SWI interrupt 0x8b HandlerPabort ;handler for PAbort 0xCb HandlerDabort ;handler for DAbort 0x10b . ;reserved 0x14 b HandlerIRQ ;handler for IRQ interrupt 0x18b HandlerFIQ ;handler for FIQ interrupt 0x1CHandlerFIQ HANDLER HandleFIQHandlerIRQ HANDLER HandleIRQHandlerUndef HANDLER HandleUndefHandlerSWI HANDLER HandleSWIHandlerDabort HANDLER HandleDabortHandlerPabort HANDLER HandlePabort ;=======; ENTRY ;=======ResetHandler;Initialize stacksbl InitStacks;=============================; Configure Crucial Peripherals ;============================= ldr r0,=WTCON ;watch dog disable @0x5300_0000ldr r1,=0x0 ;= means 0x0 is 32bit contantstr r1,[r0] ;ldr r0,=INTMSK ;ldr r1,=0xffffffff ;all interrupt disable str r1,[r0]ldr r0,=INTSUBMSK ldr r1,=0x7ff ;str r1,[r0];To reduce PLL lock time, adjust the LOCKTIME register. ldr r0,=LOCKTIME ldr r1,=0xffffffstr r1,[r0] ;Configure MPLLldr r0,=MPLLCON ldr r1,=((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV) ;Fin=12MHz,Fout=100MHzstr r1,[r0];=============================; Configure MEMORY CONTROLLER;=============================;Set memory control registers according to SMRDATA sectionldr r0,=SMRDATAldr r1,=BWSCON ;BWSCON Addressadd r2, r0, #52 ;End address of SMRDATA0 ldr r3, [r0], #4 ; load r3 from r0, then r0=r0+4 str r3, [r1], #4 ; store r3 to r1, then r1=r1+4 cmp r2, r0 bne %B0;=============================; Clear SDRAM;=============================ldr r0,=GPFCONldr r1,=0x55aa ;GPF[7:4]--output GPF[3:0]--EINT[3:0]str r1,[r0]ldr r0,=GPFUPldr r1,=0xff ;GPF up-pull resistors are disabledstr r1,[r0]ldr r0,=GPFDATldr r1,=0x0str r1,[r0] ;mov r1,#0mov r2,#0mov r3,#0mov r4,#0mov r5,#0mov r6,#0mov r7,#0mov r8,#0ldr r9,=0x3ff0000 ;Lower 32MBldr r0,=0x30010000 ;leave 64kb for code//=0x30000000LOOP ;SDRAM clearstmia r0!,{r1-r8} ;stack starts from 0x30000000, subs r9,r9,#32 ;bne LOOP ;=============================; Exception Vector Table Setup ;=============================EXCEPTION_VECTOR_TABLE_SETUPLDR r0, =HandleReset ; Exception Vector Table Memory Loc.LDR r1, =ExceptionHandlerTable ; Exception Handler AssignMOV r2, #8 ; Number of Exception is 8ExceptLoop LDR r3, [r1], #4STR r3, [r0], #4SUBS r2, r2, #1 BNE ExceptLoop;====================================================;Copy and paste RW data/zero initialized data;====================================================ldr r0, =|Image$$RO$$Limit| ; Get pointer to ROM dataldr r1, =|Image$$RW$$Base| ; and RAM copyldr r3, =|Image$$ZI$$Base| ; Zero init base => top of initialised datacmp r0, r1 ; Check that they are differentbeq %F2 ; F means forward1
cmp r1, r3 ; Copy init data ldrcc r2, [r0], #4 ;--> LDRCC r2, [r0] + ADD r0, r0, #4 strcc r2, [r1], #4 ;--> STRCC r2, [r1] + ADD r1, r1, #4 bcc %B1 ;B means backward2
ldr r1, =|Image$$ZI$$Limit| ; Top of zero init segment mov r2, #03
cmp r3, r1 ; Zero init strcc r2, [r3], #4 bcc %B3 ;====================================================; Now change to user mode and set up user mode stack.;====================================================MRS r0, cpsrBIC r0, r0, #MODEMASK ;MODEMASK=0X1FORR r0, r0, #USERMODE|NOINT ;RMSR cpsr_cxsf, r0LDR sp, =UserStack;====================================================;Jump To C Routines;====================================================IMPORT C_Entrybl C_Entry ;Don not use main() because ......;bl .;====================================================;Initialize Stacks;====================================================;function initializing stacksInitStacks;Don not use DRAM,such as stmfd,ldmfd......;SVCstack is initialized before;Under toolkit ver 2.5, 'msr cpsr,r1' can be used instead of 'msr cpsr_cxsf,r1'mrs r0,cpsrbic r0,r0,#MODEMASK ;MODEMASK=0x1forr r1,r0,#UNDEFMODE|NOINT ;r1=0xDBmsr cpsr_cxsf,r1 ;UndefModeldr sp,=UndefStackorr r1,r0,#ABORTMODE|NOINTmsr cpsr_cxsf,r1 ;AbortModeldr sp,=AbortStackorr r1,r0,#IRQMODE|NOINTmsr cpsr_cxsf,r1 ;IRQModeldr sp,=IRQStackorr r1,r0,#FIQMODE|NOINTmsr cpsr_cxsf,r1 ;FIQModeldr sp,=FIQStackbic r0,r0,#MODEMASK|NOINTorr r1,r0,#SVCMODEmsr cpsr_cxsf,r1 ;SVCModeldr sp,=SVCStack;USER mode has not be initialized.mov pc,lr ;´Ó¶ÑÕ»³õʼ»¯³ÌÐòÖзµ»Ø;The LR register won not be valid if the current mode is not SVC mode.;====================================================;The following DATA section is used to init MEMORY CONTROLLER;====================================================LTORGSMRDATA DATA ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;in ADS1.2 help documents, there is the following discription about DATA directive:;;;;The DATA directive is no longer needed. It is ignored by the assembler.;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Memory configuration should be optimized for best performance ; The following parameter is not optimized. ; Memory access cycle parameter strategy; 1) The memory settings is safe parameters even at HCLK=75Mhz.; 2) SDRAM refresh period is for HCLK=75Mhz. DCD (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28));DCD ((B6_BWSCON<<24)+(B7_BWSCON<<28)) DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) ;GCS0DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) ;GCS1 DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) ;GCS2DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) ;GCS3DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) ;GCS4DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) ;GCS5DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) ;GCS6DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) ;GCS7DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+REFCNT)DCD (0x31|0x80) ;SCLK power saving mode, BANKSIZE 64M/64M, 4-burstDCD 0x30 ;MRSR6 CL=3clkDCD 0x20 ;MRSR7;===========================================; Exception Vector Function Definition; Consist of function Call from C-Program.;===========================================SystemResetHandlerb ResetHandlerSystemUndefinedHandlerIMPORT ISR_UndefHandlerSTMFD sp!, {r0-r12,lr}B ISR_UndefHandlerLDMFD sp!, {r0-r12, pc}^SystemSwiHandlerSTMFD sp!, {r0-r12,lr}LDR r0, [lr, #-4]BIC r0, r0, #0xff000000CMP r0, #0xffBEQ MakeSVCLDMFD sp!, {r0-r12, pc}^MakeSVCMRS r1, spsrBIC r1, r1, #MODEMASKORR r2, r1, #SVCMODEMSR spsr_cf, r2LDMFD sp!, {r0-r12, pc}^SystemPrefetchHandlerIMPORT ISR_PrefetchHandlerSTMFD sp!, {r0-r12, lr}B ISR_PrefetchHandlerLDMFD sp!, {r0-r12, lr}SUBS pc, lr, #4SystemAbortHandlerIMPORT ISR_AbortHandlerSTMFD sp!, {r0-r12, lr}B ISR_AbortHandlerLDMFD sp!, {r0-r12, lr}SUBS pc, lr, #8SystemReservSUBS pc, lr, #4SystemIrqHandlerIMPORT ISR_IrqHandlerSTMFD sp!, {r0-r12, lr}BL ISR_IrqHandlerLDMFD sp!, {r0-r12, lr}SUBS pc, lr, #4SystemFiqHandlerIMPORT ISR_FiqHandlerSTMFD sp!, {r0-r7, lr}BL ISR_FiqHandlerLDMFD sp!, {r0-r7, lr}SUBS pc, lr, #4 ALIGN AREA RomData, DATA, READONLYExceptionHandlerTableDCD SystemResetHandlerDCD SystemUndefinedHandlerDCD SystemSwiHandlerDCD SystemPrefetchHandlerDCD SystemAbortHandlerDCD SystemReservDCD SystemIrqHandlerDCD SystemFiqHandler AREA RamData, DATA, READWRITE^ _ISR_STARTADDRESSHandleReset # 4 HandleUndef # 4HandleSWI # 4HandlePabort # 4HandleDabort # 4HandleReserved # 4HandleIRQ # 4HandleFIQ # 4;Don not use the label 'IntVectorTable',;The value of IntVectorTable is different with the address you think it may be.;IntVectorTableHandleEINT0 # 4HandleEINT1 # 4HandleEINT2 # 4HandleEINT3 # 4HandleEINT4_7 # 4HandleEINT8_23 # 4HandleRSV6 # 4HandleBATFLT # 4HandleTICK # 4HandleWDT # 4HandleTIMER0 # 4HandleTIMER1 # 4HandleTIMER2 # 4HandleTIMER3 # 4HandleTIMER4 # 4HandleUART2 # 4HandleLCD # 4HandleDMA0 # 4HandleDMA1 # 4HandleDMA2 # 4HandleDMA3 # 4HandleMMC # 4HandleSPI0 # 4HandleUART1 # 4HandleRSV24 # 4HandleUSBD # 4HandleUSBH # 4HandleIIC # 4HandleUART0 # 4HandleSPI1 # 4HandleRTC # 4HandleADC # 4END
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